Google Reportedly Collaborates with AMD on 10th-Gen TPU with Integrated CPU Cores

Google and AMD Collaboration on Next-Gen TPU

Google is reportedly collaborating with AMD on the development of its 10th-generation Tensor Processing Unit (TPU). This information comes from a SemiAnalysis note, suggesting a significant partnership in custom AI ASIC development. If confirmed, this would mark AMD's first major involvement in such a project.

Focus on Hybrid AI ASIC Design

The collaboration indicates Google's interest in a new type of TPU that combines its proprietary accelerator technology with on-board general-purpose CPU cores. Analysts suggest Google is drawn to AMD's CPU IP, advanced packaging, and SoIC technology. This approach aims to address CPU-heavy workloads that are becoming more prevalent in advanced AI applications.

Addressing CPU-Heavy AI Workloads

While traditional large language model (LLM) training is primarily accelerator-intensive, workloads such as reinforcement learning for reasoning and agentic models demand substantial general-purpose compute alongside accelerator operations. Integrating CPU cores directly into the TPU package could be a logical step to optimize performance for these emerging AI tasks.

Precedent in Current TPU Systems

Google has already begun increasing CPU resources in its existing TPU infrastructure. Its inference-oriented TPU 8i systems, designed for inference, reasoning, and reinforcement learning, incorporate one Google Axion CPU for every two TPUs. This contrasts with earlier 7th-generation TPU servers, which used one Intel Xeon 'Emerald Rapid' processor for every four TPUs, indicating a trend towards more CPU-intensive AI architectures.