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Marvell Introduces Three-Tier AI Memory Infrastructure, Promotes DDR4 Recycling for CXL

🔄 Updated 1h ago
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Key points

  • Marvell launched a three-tier AI memory infrastructure portfolio.
  • The company promotes DDR4 recycling for CXL memory use.
  • New Bravera SC6 PCIe 6.0 SSD controller samples in Q4 2026.
  • Portfolio includes Structera CXL controllers, Structera S switch, and Photonic Fabric.

Addressing Memory Costs and Shortages

Memory is projected to account for 30% of hyperscaler capital expenditure this year, a significant increase from previous years, with conventional DRAM contract prices rising by 90-95% in one quarter. In response to these market conditions, Marvell has introduced a three-tier "AI memory infrastructure" portfolio.

Marvell's product marketing VP, Khurram Malik, highlighted DDR4 reuse with CXL as a key use case, noting that Meta is already implementing recycled DDR4 behind CXL across millions of servers, which has reduced server counts by up to 25% for some inference workloads.

New and Existing Portfolio Components

The portfolio includes one new component: the Bravera SC6 PCIe 6.0 SSD controller, which is scheduled to sample in Q4 2026. This controller features a PCIe 6.0 x4 interface, 16 NAND channels, and 12 Arm Cortex-R82 cores, doubling the performance of its predecessor, the Bravera SC5. It supports host-managed flash translation layers, allowing cloud operators control over write placement, garbage collection, and wear leveling, with KV cache spillover from HBM to SSD as a primary workload.

Other components of the infrastructure are not new. The Structera X DDR4 and DDR5 expansion controllers, announced in July 2024, are already in hyperscaler deployments and offer inline LZ4 compression for increased effective capacity. The Structera S 30260 switch, announced in March, provides 260 PCIe 6.0 and CXL 3.x lanes, connecting multiple CPUs or GPUs to shared memory. The Photonic Fabric optical memory tier, acquired with Celestial AI in February, extends shared memory up to 50 meters.

Industry Impact and Adoption

Marvell's push for DDR4 recycling and its new memory infrastructure aim to provide solutions for hyperscalers facing high memory costs and supply constraints. While Meta has implemented a similar CXL-based DDR4 reuse strategy using its own ASIC, Marvell's portfolio offers a commercial solution for broader industry adoption.

The sampling of the Bravera SC6 in late 2026 positions Marvell to compete in the PCIe 6.0 controller market, alongside other vendors like Phison and Silicon Motion, for next-generation drive launches in 2027.

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Reporting from

Marvell announced a three-tier "AI memory infrastructure" portfolio at FMS 2026, advocating for the reuse of DDR4 memory with CXL to address rising memory costs and shortages. This initiative includes a new PCIe 6.0 SSD controller and integrates existing CXL expansion controllers, switches, and optical memory technology.