FPGA Recreation of F-14 Tomcat's CADC, Featuring MP944 Microprocessor, Released Open Source

FPGA Recreation of F-14 CADC

Embedded systems expert Alan Taylor has successfully recreated the Central Air Data Computer (CADC) from the U.S. Navy’s F-14 Tomcat in an FPGA. The CADC was responsible for advanced fighter capabilities, notably controlling the aircraft’s articulated sweep-wing system. The FPGA recreation was tested using a 3D-printed scale model of the F-14 Tomcat.

The MP944 Microprocessor's History

The CADC's core component was the MP944 microprocessor. This chip began service in June 1970, preceding Intel’s 4004, which was released in November 1971. The MP944's existence remained classified until 1998, leading to the Intel 4004 being widely recognized as the first microprocessor. The MP944 was a 20-bit, pipelined, parallel multi-microprocessor operating at 375 kHz and executing 9,375 instructions per second. It was designed by Steve Geller, Ray Holt, and a 25-member team, and was built to withstand temperatures from -55 to +125 degrees Celsius.

Role in F-14 Systems

The MP944 functioned as part of a six-chip system within the CADC, performing real-time calculations for flight parameters such as altitude, airspeed, and Mach number. This capability was crucial for enabling the F-14's articulated sweep-wing system. Some chip architecture enthusiasts claim the MP944 was eight times faster than the Intel 4004, which was originally designed for desktop calculators.

Open Source Release

Taylor's project includes a complete open-source set of VHDL source code, documentation, and testbenches for the FPGA recreation of the F-14’s CADC. The FPGA used for this project was a Spartan-7 based System-on-Module (SoM), specifically part of the Adiuvo Embedded System Tile. The release encompasses synthesizable VHDL implementations for all six original CADC chips, not just the MP944 logic.