SK hynix Vice President of Package Engineering, Jaesik Lee, stated at Hot Chips 2026 that hybrid bonding will not be implemented for HBM4E. The company now anticipates its adoption for HBM5 at the earliest. This pushes back a significant memory packaging transition that was previously expected sooner by some in the industry.
The primary reason for the delay is the 775-micron total thickness limit for HBM cubes, which matches the standard thickness of a 300mm logic wafer. This limit is critical because when a GPU package's cold plate is attached, both the logic die and memory stacks are ground to expose bare silicon. A memory cube exceeding 775 microns would protrude above the processor, creating integration issues.
To accommodate more DRAM layers within this constraint, each additional layer requires thinner dies and narrower gaps. For example, 16-Hi HBM4, currently in customer qualification, uses core dies around 50 microns thick and halves the gap between them compared to 12-Hi configurations.
Thinner dies lead to a proportionally higher oxide content in the stack, which conducts heat less efficiently than silicon. Concurrently, pin speeds have increased from 1 Gbps in early HBM to 8 Gbps in HBM4, concentrating more power within the same footprint. SK hynix data indicates a 2.2 times higher thermal burden across HBM generations, with stack counts doubling every two generations.
SK hynix's current mass reflow-molded underfill (MR-MUF) process, which stacks dies via pick-and-place and joins them in a single reflow, faces challenges with these shrinking gaps and sub-50-micron dies. Controlling warpage in such conditions is a major manufacturing hurdle for 16-Hi HBM.
Samsung had previously committed to hybrid bonding for HBM4 in May of the prior year. SK hynix, however, considered the copper-to-copper technique as a backup to its advanced MR-MUF process. The JEDEC HBM4 standard's increase of the package thickness ceiling from 720 microns to 775 microns reduced the immediate pressure to adopt hybrid bonding, contributing to its delayed implementation.
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SK hynix announced that hybrid bonding technology for High Bandwidth Memory (HBM) will not be ready for HBM4E and is now projected for HBM5 at the earliest. This delay is due to the industry-standard 775-micron thickness cap for HBM cubes, which necessitates thinner dies and narrower gaps for increased DRAM layers, posing manufacturing challenges for current technologies.