Fujitsu provided a detailed look at its 144-core Monaka server CPU at Hot Chips 2026. The Arm chip incorporates dual 256-bit SVE2 vector units, a reduction from the 512-bit SVE in its A64FX predecessor. A key design feature is that the entire last-level cache resides on a separate 5nm die, stacked beneath the 2nm compute die.
Ryohei Okazaki, lead architect for Fujitsu's processor development team, presented Monaka as a CPU engineered for AI performance and power efficiency, specifically for green AI data centers. The project is subsidized by Japan's New Energy and Industrial Technology Development Organization. Evaluation samples are currently available, with volume production scheduled for 2027.
The Monaka CPU is structured with three tiers of silicon: a 2nm core die manufactured on TSMC N2P, a 5nm SRAM die on TSMC N5 holding the complete last-level cache, and a 5nm IO die. The 2nm core die is stacked face-to-face on the SRAM die using hybrid bonding, positioned on the cooling side due to its higher heat generation. The IO die connects to the SRAM die via a silicon interposer. This approach allows Fujitsu to accelerate the time to market for its 2-nanometer-based chip by offloading elements that do not scale well to the 5nm SRAM and IO dies, keeping 2nm silicon under 30% of the total die area.
Placing the entire last-level cache on a distinct stacked die differentiates Monaka from designs like AMD's 3D V-Cache. Fujitsu also integrated low-dropout voltage regulators onto the 5nm SRAM die, directly beneath the core's floating-point units. This placement supports per-core dynamic voltage and frequency scaling, addressing the poor scaling of analog circuits at 2nm.
The Monaka CPU will be available in two SKUs: a 350W air-cooled version operating at a 2.1 GHz base frequency, and a 500W liquid-cooled version with a 2.9 GHz base frequency.
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Fujitsu unveiled details of its 144-core Monaka server CPU, confirming a design with a 2nm compute die, a separate 5nm die for the entire last-level cache, and dual 256-bit SVE2 vector units. This design aims for AI performance and power efficiency in green AI data centers, with evaluation samples available now and volume production in 2027.